A programmable logic device (PLD) may be configured to perform a variety of functions. In addition to logic resources that are configurable to implement general logic functions, a PLD may contain device management resources that are optimized to implement a particular function, such as high-speed input/output. A device management resource may be configurable to perform a set of related functions. Example device management resources include digital clock manager resources, temperature sensors, security keys, device power controls, and error checking controls.
An application function implemented in a PLD may access a device management resource from the general purpose logic resources via an on-device, dedicated interface. As the number of device management resources on a device grows, so too will the number of specialized interfaces to these resources. Not only are the interfaces to the device management resources competing for chip space with the logic resources, but restricting access by application logic to certain device management resources may be desirable in order to prevent unintended consequences, such as unintentionally powering down the chip.
The present invention may address one or more of the above issues.